1. Field of the Invention
The present invention relates to an "on-screen display" device, and more specifically to an "on-screen display" device for generating and controlling an "on-screen display" which indicates, for example, a time, a channel number and the like, on a display screen of a multisync monitor display so configured that the frequency of an input horizontal synchronous signal can be changed. In this specification, the "on-screen display" is abbreviated to "OSD".
2. Description of Related Art
In a personal computer and in a television receiver, the OSD device has been widely used as an information display means for visually indicating a time, a control panel, the channel number of a channel being received, a sound volume, etc.
Reflecting a recent multimedia generation, on the other hand, a multisync monitor capable of changing the input horizontal synchronous signal frequency to be able to satisfy various different display commands, has been widely used as a display means.
Referring to FIG. 1, there is shown a block diagram of one example of the prior art OSD device used in combination with the multisync monitor. The shown prior art OSD device includes an oscillating circuit 8 constituted of an LC oscillating circuit and configured to start to oscillate in synchronism with a rising edge of a horizontal synchronous signal H separated from an input composite video signal (not shown) to generate an OSD clock CK for a character display, and a character synthesizing circuit 3 controlled by the OSD clock CK, the horizontal synchronous signal H, a vertical synchronous signal V and a control signal CM supplied from a microcomputer (not shown), for generating an OSD display data OD.
The oscillating circuit 8 includes a NAND circuit 81 having a first input connected to receive the horizontal synchronous signal H, a tuning coil L31 connected between an output and a second input of the NAND circuit 81, a capacitor C31 connected between the second input of the NAND circuit 81 and ground, and another capacitor C32 connected between the output of the NAND circuit 81 and the ground. The output of the NAND circuit 81 generates the OSD clock CK.
Now, an operation of the shown prior art OSD device will be described with reference to FIGS. 2A and 2B, which are timing charts illustrating different operation situations of the prior art OSD device shown in FIG. 1.
The oscillating circuit 8 starts to oscillate in synchronism with the rising edge of the horizontal synchronous signal H, and the oscillation frequency is determined by a time constant determined by the coil L31 and the capacitor C31. The OSD clock CK having the oscillation frequency thus determined is supplied to the character synthesizing circuit 3. The character synthesizing circuit 3 controls a vertical direction display of the OSD character display by counting the horizontal synchronous signal H using the vertical synchronous signal V as a reference, and also controls a horizontal direction display of the OSD character display by counting the OSD clock CK using the horizontal synchronous signal H as a reference, thereby to set a vertical direction timing and a horizontal direction timing of the OSD display data OD.
When the OSD data such as characters and/or the like outputted from the OSD device is displayed on a monitor screen, a reference size in the horizontal direction is determined by a ratio of the period of the OSD clock CK to the period of the horizontal synchronous signal H.
Referring to FIGS. 2A and 2B, again, it is assumed that two different horizontal synchronous signals H1 and H2 having different periods T1 and T2, respectively, are supplied, and clocks CK1 and CK2 generated in response to the horizontal synchronous signals H1 and H2, respectively, have periods T5 and T6, respectively. In this assumption, the reference sizes of the same character displayed in two different situations, become T5/T1 and T6/T2, respectively. Here, it is also assumed that the periods T1 and T2 of the horizontal synchronous signals H1 and H2 has a relation of T1=2.times.T2. On the other hand, the clocks CK1 and CK2 generated in the oscillating circuit 8 have the same frequency, namely, the same period (T5=T6). Accordingly, the reference sizes of the displayed character become T6/(2.times.T2) and T6/T2, respectively. Namely, the character displayed in one situation in that the horizontal synchronous signal H2 is used, has twice the size of the same character displayed in the other situation in that the horizontal synchronous signal H1 is used. Assuming that the character displayed in the one situation has an appropriate size, the character displayed in the other situation is difficult to read.
When the prior art OSD device mentioned above is used in the multisync monitor having the input horizontal synchronous signal of the variable frequency, the horizontal direction reference size of the OSD data such as characters and/or the like outputted from the OSD device is determined by the ratio of the period of the OSD clock CK to the period of the horizontal synchronous signal H. Therefore, generally speaking, when two different synchronizable horizontal synchronous signals have a period relation that one has N times the period of the other where "N" is an integer not less than 2, since the generated OSD clocks have the same period, the size of the OSD data displayed on the basis of one of the two horizontal synchronous signals is N times the size of the OSD data displayed on the basis of the other horizontal synchronous signal. If the larger OSD data has an appropriate size, the other OSD data, namely, the smaller OSD data is very difficult to read.